SystemCrafter SC 3.0
SystemCrafter SC is a SystemC synthesis tool for Xilinx FPGAs. SystemCrafter SC generates RTL VHDL or Verilog for downstream synthesis to Xilinx FPGAs, and closes the verification gap by writing a structural SystemC output for simulation. SystemCrafter ...
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2Visual Elite 4.4
Visual Elite is a single solution that includes intuitive graphical design entry capabilities and can be used for design in Verilog, VHDL, C/C , SystemC, or any combination of the languages. It is a design and verification tool that can be used both ... -
3IDesignSpec2007 3.3
IDesignSpecTM is an award winning engineering tool that allows an IP, chip or system designer to create the register map specification once and automatically generate all possible views from it. Various outputs are possible such as UVM, OVM, RALF, SystemRDL, ... -
4GBL Design Studio Personal 2.0
It can be used for building system-level behavioral or cycle accurate event-driven simulators and verification suites, like SystemC, or to graphically develop algorithms, like in LabVIEW, or in building other event-driven systems, like GUI, RTOS, databases, ...Freeware